1. Field of the Invention
The present invention relates to a process of fabricating a semiconductor device.
2. Description of the Related Art
In order to meet a requirement for an increase in the maximum cut-off frequency (hereinafter, referred to as an "fTmax") of a bipolar transistor, there has been proposed a silicon series narrow base type heterojunction bipolar transistor including a base made of a material capable of making a more narrow band gap such as mixed crystals of silicon-germanium (Si.sub.1-x Ge.sub.x). And, it has been reported that the above bipolar transistor was successful in increasing the fTmax to a value of ftmax=100 GHz. Such a bipolar transistor is expected to be used in the telecommunications field which is a market of great promise with the advent of multi-media age.
In recent years, a silicon series narrow base type heterojunction bipolar transistor in which a silicon-germanium(Si.sub.1-x Ge.sub.x) thin film is formed by a selective growth process has been proposed, and put in practical use. Additionally, a known silicon series narrow base type heterojunction bipolar transistor will be described with reference to a schematic configuration thereof shown in FIG. 7.
In FIG. 7, an N.sup.+ -type buried layer 203 is formed in a semiconductor substrate 201 at a region isolated by portions of a field oxide film 202 positioned on both sides of the region. An N.sup.- -type collector layer 204 is formed on the buried layer 203, and a silicon oxide film 207 provided with opening portions 205, 206 respectively positioned over the collector layer 204 and over part of the buried layer 203 is formed on the semiconductor substrate 201. An N.sup.+ -type collector electrode 208 is formed in the opening portion 206 in contact with the buried layer 203, and a P-type base layer 209 which is made of mixed crystals of silicon-germanium(Si.sub.1-x Ge.sub.x) and is formed on the collector layer 204 in the opening portion 205.
A base contact electrode 210 made of P.sup.+ -type polycrystalline silicon is connected to the base layer 209, and a silicon oxide layer 211 is formed on the base contact electrode 210. An opening portion 212 is formed in the base layer 210, and side walls 215 formed of both a silicon oxide film 213 and a silicon nitride film 214 are formed on side walls of the opening portion 212. An N.sup.+ -type emitter layer 216 is formed in the opening portion 212 via the side walls 215 in such a manner as to make a junction with the base layer 209. A process of fabricating the above silicon series narrow base type heterojunction bipolar transistor will be described with reference to FIGS. 8A to 8C.
FIGS. 8A to 8C show steps of fabricating emitter/base portions of a transistor. Parts corresponding to those described with reference to FIG. 7 are indicated by the same reference numerals.
At a step shown in FIG. 8A, an N.sup.- -type collector layer 204 is formed on an N.sup.+ -type buried layer 203 formed in a semiconductor substrate (not shown), and a silicon oxide film 207, a base contact electrode layer 221, a silicon oxide film 211, and a silicon nitride layer 222 are sequentially formed in a state covering the N.sup.- -type collector layer 204. Then, an opening portion 212 is formed in the silicon oxide film 222, the silicon oxide film 211 and the base contact electrode layer 221 at a portion over the collector layer 204, and side walls 223 made of a silicon nitride film are formed on side walls of the opening portion 212. After that, the silicon oxide film 207 is etched using the silicon nitride film 222 and the side walls 223 as an etching mask, to form an opening portion 205 having a diameter larger than that of the opening portion 212 for exposing the collector layer 204 on the bottom of the opening portion 205.
At a step shown in FIG. 8B, a P-type base layer 209 is formed in the opening portion 205 by selective epitaxial growth of mixed crystals of silicon-germanium (Si.sub.1-x Ge.sub.x), and the silicon nitride film 222 and the side walls 223 made of the silicon nitride film are removed.
At a step shown in FIG. 8C, side walls 215 made of a silicon oxide film 213 and a silicon nitride film 214 are formed on side walls of the opening portion 212 positioned over the base layer 209, and an emitter layer 216 made of N.sup.+ -type polycrystalline silicon is formed in the opening portion 212 via the side walls 215.
In this way, in the process of fabricating the silicon series narrow base type heterojunction bipolar transistor using selective growth, silicon nitride films are frequently used.
The above high speed bipolar transistor mainly adopts a so-called double polysilicon emitter/base self-aligned structure in which each of an emitter electrode and a base electrode is formed of a polycrystalline silicon thin film. The self-aligned technology has benefits in shortening an emitter-base distance, reducing a parasitic transistor portion, and realizing an emitter length less than the exposure limit by use of the side wall formed of an insulating film. For example, Japanese Patent Publication No. Hei 6-66325 (B) employs a heterojunction bipolar transistor having the above double polysilicon emitter/base self-aligned structure in which the base layer is formed of a thin film of silicon-germanium (Si.sub.1-x Ge.sub.x). In the bipolar transistor disclosed in this document, a number of silicon nitride films are used.
In the case of fabricating an IC using the above-described narrow base type heterojunction bipolar transistor, passive elements such as a resistor, a capacitor and an inductor are required to be provided in addition to the bipolar transistor. However, there has not been disclosed any structure in which these passive elements such as a resistor, capacitor and inductor are formed on one substrate together with a narrow base type heterojunction bipolar transistor using a base layer made of mixed crystals of silicon-germanium and a fabrication process thereof. In the case of forming a MIS capacitor on one substrate together with a narrow base type heterojunction bipolar transistor, the MIS capacitor is required to be formed by a process different from a fabrication process for the bipolar transistor.